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3. Logic Minimisation


In this experiment we are going to design a logic system to solve a particular problem. To do this we are going to use the formalised method of using Karnaugh Maps to minimize the number of gates that are required for the implementation of the solution.

Note: The full set of videos is presented on the YouTube channel: DerekMolloyDCU

Equipment Required:

- Breadboard - with Voltage Regulator setup from 1.
- AND gates (7408), 
- OR gates (7432), 
- NAND gates (7400),
- Suitable resistors (pull-up/pull-down),
- LED with suitable resistor.