- To build a BCD Counter with 7-Segment Display
- To study the fundamentals of basic sequential logic concepts and circuit
- To become familiar with various types of latches and flip-flops.
IMPORTANT: This laboratory requires substantial work in advance of the lab as part of the independent learning part of this module.
- A 555-timer circuit block as the input (frequency of approx. 1 Hz is fine) - see Experiment 5
- A BCD UP/DOWN counter connected to a BCD to 7-Segment Decoder and 7-Segment Display - see Experiment Please ensure that you use the Common Anode (SA56 or 2358799 display depending on your kit number) as the Common Cathode 7-segment display (SC56) will not work correctly.
- Each member of the group should have built this (0-9) counter on their own breadboard.
- Complete the usual preparatory steps as per the previous labs.
- As with all of the previous laboratories, you must document all of your work, including the preparations.
- 1. Design a circuit to connect your counter circuits together so that the counter now counts from 0-99 instead of two counters counting from 0-9. If there are 3 members in your group the counter should count from 0-999. The output should look like the video below (sound effects not required). Also, the displays to not have to be on a single breadboard. Note: Make sure to power your boards from a common source.
- To power the circuit it is recommended that you use the Mini-Lab. You can take the supply directly from the 5V fixed outputs and bypass the voltage regulator that you used in order to build the individual circuits. You should only use one 555 timer circuit and you should connect the GND lines between the two boards in order to work from a common reference
- Modify your 0-99 (or 0-999) counter to count in Octal.
- Change it back to a decimal counter and add a button that allows you to reset your counter to zero.
Connect the two NOR gates (7402 - datasheet attached below) as shown in Figure 1. Wire up a green LED for Q and a red LED for /Q to display the output and use switches or simple wired connections for S and R.
Figure 1: An
S-Rlatch created using NOR gates
Vary the inputs
S(i.e. 0 and +5V). Attempt to obtain all the possible combinations for
/Q. Summarise the behaviour of the circuit in your write-up. Remember that latch means that it stores the previous values. Try this when you latch is "storing" a 1 and when it is storing a "0" (i.e. Q=1 or Q=0 respectively)
In your opinion why is there a both a
/Qoutput from this circuit? In your opinion why does this circuit behave in the way it does? When you input S=1 and R=1, why is the output invalid?
Using a 7473 Dual Master-Slave J-K Flip-Flop (Datasheet also attached below) IC, set up a single
J-K flip-flop. Follow the steps:
- Wire up the J-K Flip Flop as described in Figure 5 and the datasheet. Remember that if there is an active-low input that setting the input low means that it is enabled. If you set an active-low input high it is disabled. Active-low inputs are usually described by a small circle on the input wire in the logic symbol (like what you see on the /Q output in Figure 6).
- Like in Section 2 for the S-R Latch, wire LEDs on the outputs Q and /Q. Use a green LED for Q and a red LED for /Q.
- Use your 555-Timer as the CLK (clock) input to the JK-Flip Flop in the J=1, K=1 case. This means that every second the state will change. This gives you a clean clock signal. If you do not have a clean clock signal the outputs will be inconsistent for this state.
- Record your results in the table below. Measure the actual behaviour in each possible case, and fill in the table accordingly. Comment on whether the actual behaviour matches your predictions. Summarise the actual behaviour in words. Please note that the CLR input to the flip-flop is asynchronous and is active low; this means that you should connect it high in order that it is not active.
Figure 5: The
- Draw up a suitable truth table, including columns for both predicted and actual states, to record the behaviour of a
J-Kflip-flop. Fill in the predicted values before doing any experiments. Qn is the state at the last point in time and Qn+1 is the state at the next point in time. In other words, if Qn was 1 and a toggle is applied to the flip-flop it will toggle to Qn+1 = 0.
- Finally wire up the circuit as described in Figure 6 (from the course text). Note: It is the same as Figure 5 with the J and K set to high. It is a very, very basic counter. Signal A is the input from the 555-timer circuit and you should already have the signal B connected to a green LED. There should be an LED on the 555-timer circuit. What can you say about the frequency of the flashes of both LEDs? Verify the output traces that you see at the bottom of Figure 6. The traces below are for a positive-edge triggered flip-flop - are yours different?
Figure 6. A very, very basic counter! (from Lessons In Electric Circuits, Kuphaldt)
- State briefly, but clearly, what you have learned from this session.
- How did you split the work between yourself and your partner?
- What was the most difficult aspect of the lab?
- State one thing you enjoyed about the session.
- State one thing you disliked about the session.
- Add any final comment of your own.
Please submit your assignment to: http://moodle.dcu.ie/mod/assign/view.php?id=27753